Aluminum which includes aluminum alloys is one of the conductive materials used for forming wiring or a plug for semiconductor devices. An aluminum alloy may be defined as any composition where aluminum is the main component.
Conventionally, an aluminum film may be deposited using a sputtering method or a CVD method, and an aluminum pattern may be formed by etching the aluminum film using a reactive ion etch (RIE) method. Drawbacks of the conventional RIE method may include bridge problems and/or voids in the aluminum wiring patterns due to heat stress.
Recently, a damascene process has been widely used for forming aluminum wiring. A conventional damascene process is a process in which interconnect metal lines may be delineated in dielectrics isolating the interconnect metal lines from each other by chemical mechanical planarization or chemical mechanical polishing (CMP). In a conventional damascene process, an interconnect pattern may be lithographically defined in a layer of dielectric, metal is deposited to fill resulting trenches, and excess metal is removed by CMP. A conventional damascene process for forming metal wiring, such as aluminum wiring or copper wiring, is shown in FIGS. 1-5.
As shown in FIG. 1, a conventional damascene process may include depositing an inter metal dielectric layer (IMD) 12 on a substrate 10 and defining a region 14 for forming a metal wiring by patterning the IMD 12, as shown in FIG. 2.
As shown in FIG. 3, a conventional damascene process may further include forming a barrier metal layer 16, depositing a thick aluminum film 18 on the barrier metal layer 16, as shown in FIG. 4, and removing the aluminum film 18 and the barrier metal layer 16 on an upper surface of the IMD 12 using a CMP process, as shown in FIG. 5.
In the conventional damascene process for forming aluminum wiring as described above, the CMP process may affect one or more electrical characteristics of the aluminum wiring. More particularly, a removal rate selectivity of the CMP slurry may be a factor that may affect an electrical characteristic of the aluminum wiring.
When the removal rate selectivity of an aluminum film to a silicon oxide film, such as the aluminium film 16 to the Inter Metal Dielectric (IMD) layer 12 of FIGS. 1-5, is low, the aluminum film 16 can be overetched during the CMP process. Overetching may result in a damascene of a surface area of the aluminum wiring, which may increase an electrical resistance of the aluminum wiring. Accordingly, the speed of a signal transferred via the aluminum wiring of a semiconductor device may become slower, and eventually overall performance of the semiconductor device may be degraded.
As set forth above, low removal rate selectivity of a metal film, such as an aluminum film to a silicon oxide film may cause overetching of the aluminum film, decrease a surface area of the aluminum wiring, increase an electrical resistance of the aluminum wiring, reduce the speed a signal transferred via the aluminum wiring of a semiconductor device, and/or degrade the an overall performance of the semiconductor device.
Conversely, a high removal rate selectivity of metal film to silicon oxide film may cause defects such as scratches, corrosion, and/or pitting. A scratch defect, shown in FIG. 6, is a surface roughness which may result from damage caused by a polishing agent on a surface of the aluminum film. A pitting defect, shown in FIG. 7, on the surface of the aluminum film can occur when a scratch defect is more severe. A corrosion defect, shown in FIG. 8, may occur when aluminum ions break away from the aluminum film due to a chemical reaction with other materials.
The above-described defects may be caused by the soft characteristics of the metal, for example, aluminium, which has a relatively low hardness and resistance to stress. Scratches, corrosions, or pits on an aluminum film may not only reduce a reflective index of the metal, but may also decrease a reliability of the metal wiring, which in a worst case may lead to a disconnection in the metal wiring.